Integrated circuit bipolar random access memories (RAMs) have found widespread use in high speed digital computers an intermediate "scratch-pad" memories as well as in numerous other applications. The basic requirements of such bipolar RAMs have been that they provide relatively high speed operation at a relatively low cost, since such memory must often interface between high speed arithmetic sections of digital computers and slower main memories or other circuits coupled thereto. A widely used flip-flop memory cell for such bipolar RAMs includes two cross-coupled inverters each having a resistor as a load device and a dual emitter transistor as a switching device. Two emitters, one from each transistor, are coupled together and are connected to a standby current source and also to the two corresponding emitters of each of the other flip-flop memory cells in the same row. The two other emitters of each flip-flop memory cell are coupled to corresponding sense-write conductors which are shared with the other flip-flop memory cells in the same column of the array of memory cells. Various types of circuits for reading stored information out of and writing logical information into such memory cells have been utilized in the prior art. Some of the circuits require generation of an intermediate threshold voltage having a value between the collector node voltages of the selected flip-flop cell. Other approaches involve use of circuitry which is jointly utilized in the read and write operation. Such circuitry has been subject to undersirable interaction between the read and write functions. Such prior art read-write circuitry has been susceptible to "glitches" which lower the reliability of circuit operation over the required temperature range.